hv219 rev. 2 110504 1 low charge injection 8-channel high voltage analog switch features hvcmos technology for high performance very low quiescent power dissipation-10a output on-resistance typically 11 ? low parasitic capacitance dc to 10mhz analog signal frequency -60db typical off-isolation at 5mhz cmos logic circuitry for low power excellent noise immunity serial shift register logic control with latches flexible operating supply voltages surface mount packages applications medical ultrasound imaging non-destructive evaluation general description the supertex hv219 is a low sw itch resistance, low charge injection 8-channel 200v analog swit ch integrated circuit (ic) intended primarily for medical ul trasound imaging. the device can also be used for nde, non-destructive evaluation applications. the hv219 is a lower switch resi stance, 11ohms versus 22ohms, version of the supertex hv20220 device. the lower switch resistance will help reduce inserti on loss. it has the same pin configuration as that of the supertex hv20220pj and the hv20220fg. the device is manufactured us ing supertex?s hvcmos (high voltage cmos) technology with high voltage bilateral dmos structures for the outputs and low voltage cmos logic for the input control. the outputs are conf igured as eight independent single pole single throw 11 ohms analog switches. the input logic is an 8- bit serial to parallel shift register followed by an 8-bit parallel latch. the switch states are determined by the data in the latch. logic high will correspond to a closed switch and logic low as an opened switch. the hv219 is designed to operate on various combinations of high voltage supplies. for example the v pp and v nn supplies can be: +40v/-160v, +100v/-100v, or +160v/-40v. this allows the user to maximize the signal voltage for uni- polar negative, bi-polar, or uni- polar positive. block diagram hv219 initial release a 04 2 705 sw0 d le cl le cl d le cl d le cl d le cl d le cl d le cl d le cl d le cl 8 bit shift register level shifters output switches latches v pp v nn v dd d out d in clk sw1 sw2 sw3 sw4 sw5 sw6 sw7 gnd
hv219 a042705 2 ordering information package options v pp -v nn maximum analog switch voltage 28-lead plastic chip carrier plcc 48-lead tqfp die 200v 180v p-p hv219pj HV219FG hv219x absolute maximum ratings* v dd logic supply -0.5v to +15v v pp -v nn differential supply 220v v pp positive supply -0.5v to v nn +200v v nn negative supply +0.5v to ?200v logic input voltage -0.5v to v dd +0.3v analog signal range v nn to v pp peak analog signal current 3.0a storage temperature -65c to +125c 28-lead plcc 1.2w power dissipation 48 lead tqfp 1.0w * absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are refe renced to device ground. operating conditions symbol parameter value v dd logic power supply 4.5v to 13.2v v pp positive high voltage supply 40v to v nn +200v v nn negative high voltage supply -40v to -160v v ih input logic voltage high v dd -1.5v to v dd v il input logic voltage low 0v to 1.5v v sig analog signal voltage peak to peak v nn +10v to v pp -10v t a operating free air te mperature 0c to 70c
hv219 a042705 3 electrical characteristics dc characteristics (over recommended operating conditions unless otherwise noted) 0c +25c +70c sym parameter min max min typ max min max units conditions 15 13 19 24 i sig = 5ma 13 11 14 16 i sig = 200ma v pp = +40v v nn = -160v 13 11 14 15 i sig = 5ma 9 9 12 14 i sig = 200ma v pp = +100v v nn = -100v 12 10 13 15 i sig = 5ma r ons small signal switch on-resistance 11 8 13 14 ohms i sig = 200ma v pp = +160v v nn = -40v ? r ons small signal switch on-resistance matching 20 5.0 20 20 % i sig = 5ma, v pp = +100v, v nn = -100v r onl large signal switch on-resistance 8 ohms v sig = v pp -10v, i sig = 1a i sol switch off leakage per switch 5.0 1.0 10 15 a v sig = v pp -10v and v nn +10v dc offset switch off 300 100 300 300 mv r load = 100k ? dc offset switch on 500 100 500 500 mv r load = 100k ? i ppq quiescent v pp supply current 10 50 a all switches off i nnq quiescent v nn supply current -10 -50 a all switches off i ppq quiescent v pp supply current 10 50 a all switches on, i sw = 5ma i nnq quiescent v nn supply current -10 -50 a all switches on, i sw = 5ma switch output peak current 3.0 3.0 2.0 2.0 a v sig duty cycle < 0.1% f sw output switch frequency 50 khz duty cycle = 50% 6.5 7.0 8.0 v pp = +40v v nn = -160v 4.0 5.0 5.5 v pp = +100v v nn = -100v i pp average v pp supply current 4.0 5.0 5.5 ma v pp = +160v v nn = -40v 6.5 7.0 8.0 v pp = +40v v nn = -160v 4.0 5.0 5.5 v pp = +100v v nn = -100v i nn average v nn supply current 4.0 5.0 5.5 ma v pp = +160v v nn = -40v all output switches are turning on and off at 50khz with no load. i dd average v dd supply current 4.0 4.0 4.0 ma f clk = 5mhz, v dd = 5.0v i ddq quiescent v dd supply current 10 10 10 a all logic inputs are static i sor data out source current 0.45 0.45 0.70 0.40 ma v out = v dd -0.7v i sink data out sink current 0. 45 0.45 0.70 0.40 ma v out = 0.7v c in logic input capacitance 10 10 10 pf
hv219 a042705 4 electrical characteristics ac characteristics (over recommended operating conditions, v dd =5.0v, unless otherwise noted) 0c +25c +70c sym parameter min max min typ max min max unit s conditions t sd set up time before le rises 150 150 150 ns t wle time width of le 150 150 150 ns t do clock delay time to data out 150 150 150 ns tw cl time width of cl 150 150 150 ns t su set up time data to clock 15 15 8.0 20 ns t h hold time data from clock 35 35 35 ns f clk clock frequency 5.0 5.0 5.0 mhz 50% duty cycle, f data = f clk /2 tr,tf clock rise and fall times 50 50 50 ns ton turn on time 5.0 5.0 5.0 s v sig = v pp -10v, r load = 10k ? toff turn off time 5.0 5.0 5.0 s v sig = v pp -10v, r load = 10k ? 20 20 20 v pp = +40v, v nn = -160v 20 20 20 v pp = +100v, v nn = -100v dv/dt maximum v sig slew rate 20 20 20 v/ns v pp = +160v, v nn = -40v -30 -30 -33 -30 f = 5mhz, 1k ? //15pf load ko off isolation -58 -58 -58 db f = 5.0mhz, 50 ? load kcr switch crosstalk -60 db f = 5.0mhz, 50 ? load iid output switch isolation diode current 300 300 300 ma 300ns pulse width, 2.0% duty cycle c sg (off) off capacitance sw to gnd 14 25 14 20 25 14 25 pf 0v, f = 1mhz c sg (on) on capacitance sw to gnd 40 60 40 50 60 40 60 pf 0v, f = 1mhz +v spk 150 -v spk 200 mv v pp = +40v, v nn = -160v, r load = 50ohm +v spk 150 -v spk 200 mv v pp = +100v, v nn = -100v, r load = 50ohm +v spk 150 -v spk output voltage spike 200 mv v pp = +160v, v nn = -40v, r load = 50ohm 1450 v pp = +40v, v nn = -160v, v sig = 0v 1050 v pp = +100v, v nn = -100v, v sig = 0v q charge injection 550 pc v pp = +160v, v nn = -40v, v sig = 0v
hv219 a042705 5 power up/down sequence 1) power up/down sequence is arbitrary except gnd must be powered up first and powered down last. this applies for applications powering gnd of the ic with different voltages. 2) vsig must always be at or in between v pp and v nn or floating during pow er up/down transition. 3) rise and fall times of the power supplies v dd , v pp , and v nn should not be less than 1.0ms. logic truth table data in the 8-bit shift register output switch state d0 d1 d2 d3 d4 d5 d6 d7 le cl sw0 sw1 sw2 sw3 sw4 sw5 sw6 sw7 l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on x x x x x x x x h l hold previous state x x x x x x x x x h off off off off off off off off notes: 1. the eight switches operate independently. 2. serial data is clocked in on the l to h transition clock. 3. the switches go to a state retaining t heir present condition at the rising edge of the le . 4. when le is low, the shift register data flows through the latch. 5. shift register clocking has no effect on the switch states if le is high. 6. the clear input overrides all other inputs. logic timing waveform data in le clock data out d n - 1 n n + 1 d d 50% 50% 50% 50% 50% 50% 50% 50% 50% out (typ) v off on clr t wcl 90% 10% t off dd sd on t tt t t h wle su t
hv219 a042705 6 test circuits switch off leakage i sol v pp 5v v nn v pp v nn v dd gnd v nn +10v v pp -10v dc of fset on/off v pp 5v v nn v pp v nn v dd gnd v out 100k ? r l t on /t off t est circuit v pp 5v v nn v pp v nn v dd gnd v pp -10v r l 10k ? v out isolation diode current i id v pp 5v v nn v pp v nn v dd gnd v nn v sig crosstalk k cr = 20log v out v in v in = 10 v p-p @5mhz nc 50 ? v pp 5v v nn v pp v nn v dd gnd 50 ? charge injection v pp 5v v nn v pp v nn v dd gnd v sig v out 1000pf q = 1000pf x v out v out output v oltage spike v pp 5v v nn v pp v nn v dd gnd v out 1k ? r l 50 ? +v spk -v spk off isolation k o = 20log v out v in v in = 10 v p-p @5mhz v pp 5v v nn v pp v nn v dd gnd r l v out
hv219 a042705 7 pin configuration dimensions in inches (dimensions in millimeters) measurement legend = 28 pin j-lead pin function pin function 1 s w3 15 n/c 2 s w3 16 d in 3 s w2 17 clk 4 s w2 18 le 5 s w1 19 cl 6 s w1 20 d out 7 s w0 21 s w7 8 s w0 22 s w7 9 n/c 23 s w6 10 v pp 24 s w6 11 n/c 25 s w5 12 v nn 26 s w5 13 gnd 27 s w4 14 v dd 28 s w4 pin #1 b.c. of bend radii 0.480 0.010 (12.192 0.254) d e 0.050 0.010 (1.270 0.254) 0.450 0.005 (11.430 0.127) d 1 b 0.027 0.003 (0.6858 0.0762) 0.1725 0.0075 (4.3815 0.1905) a a 2 min. 0.020 (0.508) 0.410 0.010 (10.414 0.254) 0.110 0.010 (2.794 0.254) q top view 28-pin j-lead package 1 2 3 4 567891011 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 28-pin j-lead package outline
hv219 a042705 8 48-pin tqfp pin configuration 1 # n i p 0 - 7 b s c 0.354 0.010 (8.992 0.254) 0.275 0.004 (6.985 0.102) 0.354 0.010 (8.992 0.254) d 1 , e 1 d, e 0.275 0.004 (6.985 0.1016) a 2 0.055 0.004 (1.397 0.102) 0.020 (0.508) typ. 0.039 (0.991) a 0.059 0.004 (1.4986 0.102) 0.024 0.008 (0.610 0.2032) l 1 # n i p pin 1 top view 48-pin tqfp pin 12 hv219 48-pin tqfp pin function 1 s w5 2 n/c 3 s w4 4 n/c 5 s w4 6 n/c 7 n/c 8 s w3 9 n/c 10 s w3 11 n/c 12 s w2 13 n/c 14 s w2 15 n/c 16 s w1 17 n/c 18 s w1 19 n/c 20 s w0 21 n/c 22 s w0 23 n/c 24 v pp pin function 25 v nn 26 n/c 27 n/c 28 gnd 29 v dd 30 n/c 31 n/c 32 n/c 33 d in 34 clk 35 le 36 clr 37 d out 38 n/c 39 s w7 40 n/c 41 s w7 42 n/c 43 s w6 44 n/c 45 s w6 46 n/c 47 s w5 48 n/c dimensions in inches (dimensions in millimeters) measurement legend = a 04 2 705
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